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<TITLE>VICE Manual - 8 Snapshots</TITLE>
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The ACIA 6551 is an RS232 interface chip. VICE emulates RS232 connections
via <CODE>/dev/ttyS*</CODE> (Unix) or <CODE>COM:</CODE> (DOS/WIN - not yet?).
When saving a snapshot, those connections are of course lost.
The state of the ACIA however is restored if possible. I.e. if a connection
is already open when restoring the snapshot, this connection is used
instead. If no connection is open, a carrier/DTR drop is emulated.
</P>
<P>
Version numbers: Major 1, Minor 0.
</P>
<TABLE BORDER>
<TR><TD>Type</TD>
<TD>Name</TD>
<TD>Description</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>TDR</TD>
<TD>Transmit Data Register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>RDR</TD>
<TD>Receiver Data Register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>SR</TD>
<TD>Status Register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>CMD</TD>
<TD>Command Register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>CTRL</TD>
<TD>Ctrl Register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>INTX</TD>
<TD>0 = no data to tx; 1 = Data is being transmitted; 2 = Data is being transmitted while data in TDR waiting to be put to internal transmit register</TD>
</TR>
<TR><TD>DWORD</TD>
<TD>TICKS</TD>
<TD>Clock ticks till the next TDR empty interrupt</TD>
<TD>Bit 0: 1= ROM block $2*** enabled. Bit 1: 1= ROM block $3*** enabled. Bit 2: 1= ROM block $4*** enabled. Bit 3: 1= ROM block $5*** enabled. Bit 4: 1= ROM block $6*** enabled. Bit 5: 1= ROM block $7*** enabled. Bit 6: 1= ROM block $A*** enabled. Bit 7: 1= ROM block $B*** enabled.</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>KERNAL</TD>
<TD>8k KERNAL ROM image $e000-$ffff</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BASIC</TD>
<TD>16k BASIC ROM image $c000-$dfff</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>CHARGEN</TD>
<TD>4k CHARGEN ROM image</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK1A</TD>
<TD>4k ROM image $2*** (if CONFIG & 1)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK1B</TD>
<TD>4k ROM image $3*** (if CONFIG & 2)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK3A</TD>
<TD>4k ROM image $6*** (if CONFIG & 16)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK3B</TD>
<TD>4k ROM image $7*** (if CONFIG & 32)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK5A</TD>
<TD>4k ROM image $A*** (if CONFIG & 64)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK5B</TD>
<TD>4k ROM image $B*** (if CONFIG & 128)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK2A</TD>
<TD>4k ROM image $4*** (if CONFIG & 4; added in V1.1)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BLK2B</TD>
<TD>4k ROM image $5*** (if CONFIG & 8; added in V1.1)</TD>
</TR></TABLE>
<H4><A NAME="SEC133" HREF="vice_toc.html#TOC133">8.2.2.17 PET memory module</A></H4>
<P>
The PET memory module actually consists of two modules. The "PETMEM" module
is mandatory and contains the RAM dump. The "PETROM" module is optional
and contains a dump of the ROM images.
</P>
<P>
The size of the PET memory modules differs with each different memory
configuration. The RAM configuration is saved in the snapshot, and
restored when the snapshot is loaded.
</P>
<P>
<B>The PETMEM module</B>
</P>
<P>
Version numbers: Major 1, Minor 2
</P>
<TABLE BORDER>
<TR><TD>Type</TD>
<TD>Name</TD>
<TD>Description</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>CONFIG</TD>
<TD>Configuration value. Bits 0-3: 0= 40 col PET without CRTC; 1= 40 col PET with CRTC; 2 = 80 col PET (with CRTC); 3= SuperPET; 4= 8096; 5= 8296. Bit 6: 1= RAM at $9***. Bit 7: 1= RAM at $A***.</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>KEYBOARD</TD>
<TD>Keyboard type. 0= UK business; 1= Graphics; 2= German business</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>MEMSIZE</TD>
<TD>memory size of low 32k in k (possible values 4, 8, 16, 32)</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>CONF8X96</TD>
<TD>Value of the 8x96 configuration register</TD>
</TR>
<TR><TD>BYTE</TD>
<TD>SUPERPET</TD>
<TD>SuperPET config. Bit 0: 1= $9*** RAM enabled. Bit 1: 1= RAM write protected. Bit 2: 1= CTRL register write protected. Bit 3: 0= DIAG pin active. Bits 4-7: RAM block in use. </TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>RAM</TD>
<TD>4-32k RAM (not 8296, size depends on MEMSIZE)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>VRAM</TD>
<TD>2/4k RAM (not 8296, size depends on CONFIG)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>EXTRAM</TD>
<TD>64k expansion RAM (SuperPET and 8096 only)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>RAM</TD>
<TD>128k RAM (8296 only)</TD>
</TR>
<TR><TD>--</TD>
<TD>--</TD>
<TD>The following item has been added in V1.1</TD>
The CBM-II memory module actually consists of two modules. The
"CBM2MEM" module is mandatory and contains the RAM dump. The "CBM2ROM"
module is optional and contains a dump of the ROM images.
</P>
<P>
The size of the CBM-II memory modules differs with each different memory
configuration. The RAM configuration is saved in the snapshot, and
restored when the snapshot is loaded.
</P>
<P>
Version numbers: Major 1, Minor 0
</P>
<P>
<B>The CBM2MEM module</B>
</P>
<TABLE BORDER>
<TR><TD>Type</TD>
<TD>Name</TD>
<TD>Description</TD>
</TR>
<TR><TD>UBYTE</TD>
<TD>MEMSIZE</TD>
<TD>Memory size in 128k blocks (1=128k, 2=256k, 4=512k, 8=1024k)</TD>
</TR>
<TR><TD>UBYTE</TD>
<TD>CONFIG</TD>
<TD>Bit 0 = $f0800-$f0fff RAM, Bit 1 = $f1000-$f1fff RAM, Bit 2 = $f2000-$f3fff RAM, Bit 3 = $f4000-$f5fff RAM, Bit 4 = $f6000-$f7fff RAM, Bit 5 = $fc000-$fcfff RAM, Bit 6 = is a C500</TD>
The RAM* arrays are only saved if the RAM itself is less than 1M.
If the memory size is 1M then those areas are taken from the
bank 15 area of the normal RAM.
</P>
<P>
The memory array starts at $10000 if the memory size is less than 512k,
or at $00000 if 512k or more. In case of a C510, then the memory array
also always starts at $00000.
</P>
<P>
<B>The CBM2ROM module</B>
</P>
<TABLE BORDER>
<TR><TD>Type</TD>
<TD>Name</TD>
<TD>Description</TD>
</TR>
<TR><TD>UBYTE</TD>
<TD>CONFIG</TD>
<TD>Bit 1: 1= $1*** ROM image included. Bit 2: 1= $2000-$3fff ROM image included. Bit 3: 1= $4000-$5fff ROM image included. Bit 4: 1= $6000-$7fff ROM image included. Bit 5: 1= chargen ROM is VIC-II chargen, 0= CRTC chargen.</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>KERNAL</TD>
<TD>8 KERNAL ROM image ($e000-$efff)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>BASIC</TD>
<TD>BASIC ROM image ($8000-$bfff)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>CHARGEN</TD>
<TD>4k CHARGEN ROM image</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>ROM1</TD>
<TD>4k cartridge ROM image for $1*** (if CONFIG & 2)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>ROM2</TD>
<TD>8k cartridge ROM image for $2000-$3fff (if CONFIG & 4)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>ROM4</TD>
<TD>8k cartridge ROM image for $4000-$5fff (if CONFIG & 8)</TD>
</TR>
<TR><TD>ARRAY</TD>
<TD>ROM6</TD>
<TD>8k cartridge ROM image for $6000-$7fff (if CONFIG & 16)</TD>
</TR></TABLE>
<H4><A NAME="SEC135" HREF="vice_toc.html#TOC135">8.2.2.19 C500 data module</A></H4>
<P>
The C500 data module contains simple state information not already saved
in the other modules.
</P>
<P>
Version numbers: Major 0, Minor 0
</P>
<P>
<B>The C500DATA module</B>
</P>
<TABLE BORDER>
<TR><TD>Type</TD>
<TD>Name</TD>
<TD>Description</TD>
</TR>
<TR><TD>DWORD</TD>
<TD>IRQCLK</TD>
<TD>CPU clock ticks till next 50Hz IRQ</TD>
</TR></TABLE>
<P><HR><P>
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